The Elements of Computing Systems, 2e
Building a Modern Computer from First Principles
by Nisan, Schocken
ISBN: 9780262364027 | Copyright 2021
Instructor Requests
Expand/Collapse All | |
---|---|
Contents (pg. vii) | |
Preface (pg. ix) | |
Scope (pg. x) | |
Courses (pg. xi) | |
Resources (pg. xii) | |
Structure (pg. xiii) | |
Projects (pg. xiii) | |
The Second Edition (pg. xiv) | |
Acknowledgments (pg. xv) | |
I. Hardware (pg. 1) | |
Hello, World Below (pg. 1) | |
Nand to Tetris (pg. 2) | |
Abstraction and Implementation (pg. 4) | |
Methodology (pg. 6) | |
The Road Ahead (pg. 7) | |
1. Boolean Logic (pg. 9) | |
1.1 Boolean Algebra (pg. 9) | |
1.2 Logic Gates (pg. 12) | |
1.3 Hardware Construction (pg. 14) | |
1.4 Specification (pg. 19) | |
1.5 Implementation (pg. 24) | |
1.6 Project (pg. 27) | |
1.7 Perspective (pg. 28) | |
2. Boolean Arithmetic (pg. 31) | |
2.1 Arithmetic Operations (pg. 31) | |
2.2 Binary Numbers (pg. 32) | |
2.3 Binary Addition (pg. 33) | |
2.4 Signed Binary Numbers (pg. 34) | |
2.5 Specification (pg. 35) | |
2.6 Implementation (pg. 41) | |
2.7 Project (pg. 42) | |
2.8 Perspective (pg. 43) | |
3. Memory (pg. 45) | |
3.1 Memory Devices (pg. 46) | |
3.2 Sequential Logic (pg. 46) | |
3.3 Specification (pg. 51) | |
3.4 Implementation (pg. 54) | |
3.5 Project (pg. 58) | |
3.6 Perspective (pg. 59) | |
4. Machine Language (pg. 61) | |
4.1 Machine Language: Overview (pg. 62) | |
4.2 The Hack Machine Language (pg. 65) | |
4.3 Hack Programming (pg. 76) | |
4.4 Project (pg. 78) | |
4.5 Perspective (pg. 80) | |
5. Computer Architecture (pg. 83) | |
5.1 Computer Architecture Fundamentals (pg. 84) | |
5.2 The Hack Hardware Platform: Specification (pg. 88) | |
5.3 Implementation (pg. 94) | |
5.4 Project (pg. 98) | |
5.5 Perspective (pg. 100) | |
6. Assembler (pg. 103) | |
6.1 Background (pg. 103) | |
6.2 The Hack Machine Language Specification (pg. 106) | |
6.3 Assembly-to-Binary Translation (pg. 108) | |
6.4 Implementation (pg. 109) | |
6.5 Project (pg. 113) | |
6.6 Perspective (pg. 114) | |
II. Software (pg. 117) | |
II.1 A Taste of Jack Programming (pg. 118) | |
II.2 Program Compilation (pg. 122) | |
7. Virtual Machine I: Processing (pg. 125) | |
7.1 The Virtual Machine Paradigm (pg. 126) | |
7.2 Stack Machine (pg. 128) | |
7.3 VM Specification, Part I (pg. 133) | |
7.4 Implementation (pg. 134) | |
7.5 Project (pg. 142) | |
7.6 Perspective (pg. 144) | |
8. Virtual Machine II: Control (pg. 147) | |
8.1 High-Level Magic (pg. 148) | |
8.2 Branching (pg. 149) | |
8.3 Functions (pg. 151) | |
8.4 VM Specification, Part II (pg. 157) | |
8.5 Implementation (pg. 159) | |
8.6 Project (pg. 165) | |
8.7 Perspective (pg. 168) | |
9. High-Level Language (pg. 171) | |
9.1 Examples (pg. 172) | |
9.2 The Jack Language Specification (pg. 177) | |
9.3 Writing Jack Applications (pg. 185) | |
9.4 Project (pg. 187) | |
9.5 Perspective (pg. 188) | |
10. Compiler I: Syntax Analysis (pg. 191) | |
10.1 Background (pg. 192) | |
10.2 Specification (pg. 200) | |
10.3 Implementation (pg. 202) | |
10.4 Project (pg. 206) | |
10.5 Perspective (pg. 210) | |
11. Compiler II: Code Generation (pg. 211) | |
11.1 Code Generation (pg. 212) | |
11.2 Specification (pg. 230) | |
11.3 Implementation (pg. 231) | |
11.4 Project (pg. 239) | |
11.5 Perspective (pg. 242) | |
12. Operating System (pg. 245) | |
12.1 Background (pg. 246) | |
Efficiency First (pg. 248) | |
Multiplication (pg. 248) | |
Division (pg. 249) | |
Square Root (pg. 250) | |
12.2 The Jack OS Specification (pg. 261) | |
12.3 Implementation (pg. 261) | |
12.4 Project (pg. 267) | |
Testing Plan (pg. 268) | |
Complete Test (pg. 271) | |
12.5 Perspective (pg. 271) | |
13. More Fun to Go (pg. 273) | |
Hardware Realizations (pg. 274) | |
Hardware Improvements (pg. 274) | |
High-Level Languages (pg. 275) | |
Optimization (pg. 275) | |
Communications (pg. 275) | |
Appendices (pg. 277) | |
1: Boolean Function Synthesis (pg. 277) | |
A1.1 Boolean Algebra (pg. 277) | |
A1.2 Synthesizing Boolean Functions (pg. 278) | |
A1.3 The Expressive Power of Nand (pg. 279) | |
2: Hardware Description Language (pg. 283) | |
A2.1 HDL Basics (pg. 283) | |
A2.2 Multi-Bit Buses (pg. 286) | |
A2.3 Built-In Chips (pg. 287) | |
A2.4 Sequential Chips (pg. 289) | |
A2.5 Visualizing Chips (pg. 291) | |
A2.6 HDL Survival Guide (pg. 294) | |
3: Test Description Language (pg. 299) | |
A3.1 General Guidelines (pg. 300) | |
A3.2 Testing Chips on the Hardware Simulator (pg. 301) | |
A3.3 Testing Machine Language Programs on the CPU Emulator (pg. 308) | |
A3.4 Testing VM Programs on the VM Emulator (pg. 310) | |
4: The Hack Chip Set (pg. 313) | |
5: The Hack Character Set (pg. 315) | |
6: The Jack OS API (pg. 317) | |
Math (pg. 317) | |
String (pg. 317) | |
Array (pg. 318) | |
Output (pg. 318) | |
Screen (pg. 319) | |
Keyboard (pg. 319) | |
Memory (pg. 320) | |
Sys (pg. 320) |
Noam Nisan
Noam Nisan is Professor at the Institute of Computer Science and Engineering, Hebrew University of Jerusalem.
Simon Schocken
Shimon Schocken is the IDB Professor of Information Technologies and Dean of the Efi Arazi School of Computer Science, Interdisciplinary Center Herzliya.
eTextbook
Go paperless today! Available online anytime, nothing to download or install.
|